pr 29
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@ -242,14 +242,15 @@ mod tests {
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006C GetLocal U32(1)
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006C GetLocal U32(1)
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0072 SetLocal U32(2)
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0072 SetLocal U32(2)
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0078 Nop
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0078 Nop
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007A LoadRef U32(0)
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007A GetLocal U32(2)
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0080 SetLocal U32(3)
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0080 LoadRef U32(0)
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0086 GetLocal U32(3)
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0086 SetLocal U32(3)
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008C PushConst U32(5)
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008C GetLocal U32(3)
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0092 Add
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0092 PushConst U32(5)
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0094 SetLocal U32(4)
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0098 Add
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009A Nop
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009A SetLocal U32(4)
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009C Ret
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00A0 Nop
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00A2 Ret
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"#;
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"#;
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assert_eq!(disasm_text, expected_disasm);
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assert_eq!(disasm_text, expected_disasm);
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@ -238,6 +238,8 @@ impl<'a> Lowerer<'a> {
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// 3. Begin Operation
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// 3. Begin Operation
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self.emit(Instr::BeginPeek { gate: ValueId(gate_slot) });
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self.emit(Instr::BeginPeek { gate: ValueId(gate_slot) });
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self.emit(Instr::GetLocal(gate_slot));
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self.emit(Instr::LoadRef(0));
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// 4. Bind view to local
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// 4. Bind view to local
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self.local_vars.push(HashMap::new());
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self.local_vars.push(HashMap::new());
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@ -266,6 +268,8 @@ impl<'a> Lowerer<'a> {
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// 3. Begin Operation
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// 3. Begin Operation
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self.emit(Instr::BeginBorrow { gate: ValueId(gate_slot) });
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self.emit(Instr::BeginBorrow { gate: ValueId(gate_slot) });
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self.emit(Instr::GetLocal(gate_slot));
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self.emit(Instr::LoadRef(0));
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// 4. Bind view to local
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// 4. Bind view to local
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self.local_vars.push(HashMap::new());
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self.local_vars.push(HashMap::new());
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@ -294,6 +298,8 @@ impl<'a> Lowerer<'a> {
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// 3. Begin Operation
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// 3. Begin Operation
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self.emit(Instr::BeginMutate { gate: ValueId(gate_slot) });
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self.emit(Instr::BeginMutate { gate: ValueId(gate_slot) });
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self.emit(Instr::GetLocal(gate_slot));
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self.emit(Instr::LoadRef(0));
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// 4. Bind view to local
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// 4. Bind view to local
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self.local_vars.push(HashMap::new());
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self.local_vars.push(HashMap::new());
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@ -75,24 +75,15 @@ pub fn lower_function(core_func: &ir_core::Function) -> Result<ir_vm::Function>
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type_id: ir_vm::TypeId(ty.0),
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type_id: ir_vm::TypeId(ty.0),
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slots: *slots
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slots: *slots
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},
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},
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ir_core::Instr::BeginPeek { .. } => {
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ir_core::Instr::BeginPeek { .. } => ir_vm::InstrKind::GateBeginPeek,
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vm_func.body.push(ir_vm::Instruction::new(ir_vm::InstrKind::GateBeginPeek, None));
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ir_core::Instr::BeginBorrow { .. } => ir_vm::InstrKind::GateBeginBorrow,
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ir_vm::InstrKind::GateLoad { offset: 0 }
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ir_core::Instr::BeginMutate { .. } => ir_vm::InstrKind::GateBeginMutate,
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}
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ir_core::Instr::BeginBorrow { .. } => {
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vm_func.body.push(ir_vm::Instruction::new(ir_vm::InstrKind::GateBeginBorrow, None));
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ir_vm::InstrKind::GateLoad { offset: 0 }
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}
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ir_core::Instr::BeginMutate { .. } => {
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vm_func.body.push(ir_vm::Instruction::new(ir_vm::InstrKind::GateBeginMutate, None));
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ir_vm::InstrKind::GateLoad { offset: 0 }
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}
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ir_core::Instr::EndPeek => ir_vm::InstrKind::GateEndPeek,
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ir_core::Instr::EndPeek => ir_vm::InstrKind::GateEndPeek,
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ir_core::Instr::EndBorrow => ir_vm::InstrKind::GateEndBorrow,
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ir_core::Instr::EndBorrow => ir_vm::InstrKind::GateEndBorrow,
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ir_core::Instr::EndMutate => ir_vm::InstrKind::GateEndMutate,
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ir_core::Instr::EndMutate => ir_vm::InstrKind::GateEndMutate,
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ir_core::Instr::LoadRef(offset) => ir_vm::InstrKind::GateLoad { offset: *offset },
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ir_core::Instr::LoadRef(offset) => ir_vm::InstrKind::GateLoad { offset: *offset },
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ir_core::Instr::StoreRef(offset) => ir_vm::InstrKind::GateStore { offset: *offset },
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ir_core::Instr::StoreRef(offset) => ir_vm::InstrKind::GateStore { offset: *offset },
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ir_core::Instr::Free => ir_vm::InstrKind::Nop,
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ir_core::Instr::Free => anyhow::bail!("Instruction 'Free' cannot be represented in ir_vm v0"),
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};
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};
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vm_func.body.push(ir_vm::Instruction::new(kind, None));
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vm_func.body.push(ir_vm::Instruction::new(kind, None));
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}
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}
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@ -1,35 +1,3 @@
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# PR-04 — Update `core_to_vm` Lowering (Kill Placeholders)
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### Goal
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Make lowering the **only** integration point between Core IR and VM IR.
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### Required Mapping
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* `ir_core::Alloc { ty, slots }`
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→ `ir_vm::Alloc { type_id, slots }`
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* `BeginPeek / Borrow / Mutate`
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→ `GateBegin*`
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* `EndPeek / Borrow / Mutate`
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→ `GateEnd*`
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**Forbidden:**
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* `LoadRef(0)`
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* `Nop` as semantic replacement
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### Tests
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* Given a Core IR program with alloc + begin/end, VM IR must contain:
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* shape-explicit `Alloc`
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* correctly paired gate begin/end
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* zero placeholders
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---
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# PR-05 — Gate-Aware Access Path (Choose One, Explicitly)
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# PR-05 — Gate-Aware Access Path (Choose One, Explicitly)
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### Goal
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### Goal
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