146 Commits

Author SHA1 Message Date
9ed16301ab
update agenda studio 2026-03-24 13:42:39 +00:00
cb786c2663
added agendas studio 2026-03-24 13:42:38 +00:00
11ca697fa4
clean up 2026-03-24 13:42:38 +00:00
e3389e78b6
updated packer specs 2026-03-24 13:42:38 +00:00
f27b28c516
updated packer agendas 2026-03-24 13:42:38 +00:00
900a7e17dd
updated packer agendas 2026-03-24 13:42:38 +00:00
4aef6cdaeb
updated packer agendas 2026-03-24 13:42:38 +00:00
8c930c3d2e
add packer agendas 2026-03-24 13:42:38 +00:00
d95dfa296c
packer base structure 2026-03-24 13:42:38 +00:00
e0f1d74204
clean up 2026-03-24 13:42:37 +00:00
b33dc7c18d
canonical path for intrinsics 2026-03-24 13:42:37 +00:00
ba69a64832
refactoring and reducing complexity 2026-03-24 13:42:35 +00:00
14dce7ecc4
refactoring and reducing complexity 2026-03-24 13:42:35 +00:00
1c38b19772
refactoring and reducing complexity 2026-03-24 13:42:35 +00:00
f84705b67d
clean up 2026-03-24 13:42:34 +00:00
fdef7fbc3e
implements PR-09.6: define canonical ISA intrinsic registry ownership in specs 2026-03-24 13:42:34 +00:00
6a7eba30c0
implements PR-09.4: refresh specs for ModuleId-only and qualified EntrypointRef 2026-03-24 13:42:33 +00:00
98adb67bc0
added PRs 2026-03-24 13:42:33 +00:00
e11cfee9a4
added PRs 2026-03-24 13:42:32 +00:00
5630f8f119
new test main with code directly (fixes) 2026-03-24 13:42:32 +00:00
14f9b5dd26
implements PR-07.2 2026-03-24 13:42:32 +00:00
b91a3cea34
implements PR-07.1 2026-03-24 13:42:31 +00:00
a84dece9f6
added PRs 2026-03-24 13:42:31 +00:00
f8a420ac7d
implements PR-06.6 2026-03-24 13:42:31 +00:00
4fb3d686e3
implements PR-06.5 2026-03-24 13:42:31 +00:00
3e345ab827
implements PR-06.4 2026-03-24 13:42:31 +00:00
71d18d27c5
implements PR-06.3 2026-03-24 13:42:31 +00:00
bc98d5a3d4
implements PR-06.2 2026-03-24 13:42:31 +00:00
0ec5693b0d
implements PR-06.1 2026-03-24 13:42:31 +00:00
7ccdd7b7e2
added PRs 2026-03-24 13:42:30 +00:00
280c4b5adc
implements PR-05.8 2026-03-24 13:42:30 +00:00
88c849d3b0
added PRs 2026-03-24 13:42:29 +00:00
b3e8c22086
added PRs 2026-03-24 13:42:29 +00:00
8a4b494ad0
clean up 2026-03-24 13:42:29 +00:00
bbcb65b048
added PRs 2026-03-24 13:42:27 +00:00
a5769cf980
clean up 2026-03-24 13:42:27 +00:00
bfa5f06fb6
added PRs for improvement to VM top grade 2026-03-24 13:42:26 +00:00
f561cf3227
added PRs for backend VM 2026-03-24 13:42:24 +00:00
b83d97bdee
add specs regarding IRBackend to IRVM -> bytecode 2026-03-24 13:42:24 +00:00
f4073858b1
add agendas and decisions 2026-03-24 13:42:24 +00:00
2e640a14ae
add agendas and decisions 2026-03-24 13:42:24 +00:00
a26237cb87
delete runtime file docs 2026-03-24 13:42:24 +00:00
09fa9647e1
added Gate U tests per stdlib versions, and ISA files for core bytecode 2026-03-24 13:42:24 +00:00
bbf5199646
clean up 2026-03-24 13:42:24 +00:00
9615edb137
implements PR031 2026-03-24 13:42:24 +00:00
f7abaf27d4
implements PR031 2026-03-24 13:42:23 +00:00
495104db6d
implements PR030 2026-03-24 13:42:23 +00:00
01c5b6649a
implements PR029 2026-03-24 13:42:23 +00:00
fc734403b5
created PRs 2026-03-24 13:42:23 +00:00
950c396aac
clean up 2026-03-24 13:42:23 +00:00