pr 34
This commit is contained in:
Nilton Constantino
parent
ca3a5d4d3f
commit
c797be9287
@ -41,7 +41,7 @@ pub fn disasm(rom: &[u8]) -> Result<Vec<Instr>, String> {
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match opcode {
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OpCode::PushConst | OpCode::PushI32 | OpCode::Jmp | OpCode::JmpIfFalse | OpCode::JmpIfTrue
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| OpCode::GetGlobal | OpCode::SetGlobal | OpCode::GetLocal | OpCode::SetLocal
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| OpCode::PopN | OpCode::Syscall | OpCode::LoadRef | OpCode::StoreRef => {
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| OpCode::PopN | OpCode::Syscall | OpCode::GateLoad | OpCode::GateStore => {
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let v = read_u32_le(&mut cursor).map_err(|e| e.to_string())?;
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operands.push(DisasmOperand::U32(v));
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}
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@ -58,11 +58,11 @@ pub fn disasm(rom: &[u8]) -> Result<Vec<Instr>, String> {
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cursor.read_exact(&mut b_buf).map_err(|e| e.to_string())?;
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operands.push(DisasmOperand::Bool(b_buf[0] != 0));
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}
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OpCode::Call => {
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let addr = read_u32_le(&mut cursor).map_err(|e| e.to_string())?;
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let args = read_u32_le(&mut cursor).map_err(|e| e.to_string())?;
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operands.push(DisasmOperand::U32(addr));
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operands.push(DisasmOperand::U32(args));
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OpCode::Call | OpCode::Alloc => {
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let v1 = read_u32_le(&mut cursor).map_err(|e| e.to_string())?;
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let v2 = read_u32_le(&mut cursor).map_err(|e| e.to_string())?;
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operands.push(DisasmOperand::U32(v1));
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operands.push(DisasmOperand::U32(v2));
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}
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_ => {}
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}
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@ -153,19 +153,46 @@ pub enum OpCode {
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/// Ends the current local scope, discarding its local variables.
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PopScope = 0x53,
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// --- 6.7 Heap ---
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// --- 6.7 HIP (Heap Interface Protocol) ---
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/// Allocates `size` slots on the heap.
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/// Stack: [size] -> [reference]
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/// Allocates `slots` slots on the heap with the given `type_id`.
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/// Operands: type_id (u32), slots (u32)
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/// Stack: [] -> [gate]
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Alloc = 0x60,
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/// Reads a value from the heap at `reference + offset`.
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/// Reads a value from the heap at `gate + offset`.
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/// Operand: offset (u32)
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/// Stack: [reference] -> [value]
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LoadRef = 0x61,
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/// Writes a value to the heap at `reference + offset`.
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/// Stack: [gate] -> [value]
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GateLoad = 0x61,
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/// Writes a value to the heap at `gate + offset`.
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/// Operand: offset (u32)
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/// Stack: [reference, value] -> []
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StoreRef = 0x62,
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/// Stack: [gate, value] -> []
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GateStore = 0x62,
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/// Marks the beginning of a Peek scope for a gate.
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/// Stack: [gate] -> [gate]
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GateBeginPeek = 0x63,
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/// Marks the end of a Peek scope for a gate.
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/// Stack: [gate] -> [gate]
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GateEndPeek = 0x64,
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/// Marks the beginning of a Borrow scope for a gate.
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/// Stack: [gate] -> [gate]
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GateBeginBorrow = 0x65,
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/// Marks the end of a Borrow scope for a gate.
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/// Stack: [gate] -> [gate]
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GateEndBorrow = 0x66,
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/// Marks the beginning of a Mutate scope for a gate.
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/// Stack: [gate] -> [gate]
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GateBeginMutate = 0x67,
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/// Marks the end of a Mutate scope for a gate.
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/// Stack: [gate] -> [gate]
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GateEndMutate = 0x68,
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/// Increments the reference count of a gate.
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/// Stack: [gate] -> [gate]
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GateRetain = 0x69,
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/// Decrements the reference count of a gate.
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/// Stack: [gate] -> []
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GateRelease = 0x6A,
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// --- 6.8 Peripherals and System ---
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@ -226,8 +253,16 @@ impl TryFrom<u16> for OpCode {
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0x52 => Ok(OpCode::PushScope),
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0x53 => Ok(OpCode::PopScope),
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0x60 => Ok(OpCode::Alloc),
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0x61 => Ok(OpCode::LoadRef),
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0x62 => Ok(OpCode::StoreRef),
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0x61 => Ok(OpCode::GateLoad),
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0x62 => Ok(OpCode::GateStore),
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0x63 => Ok(OpCode::GateBeginPeek),
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0x64 => Ok(OpCode::GateEndPeek),
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0x65 => Ok(OpCode::GateBeginBorrow),
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0x66 => Ok(OpCode::GateEndBorrow),
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0x67 => Ok(OpCode::GateBeginMutate),
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0x68 => Ok(OpCode::GateEndMutate),
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0x69 => Ok(OpCode::GateRetain),
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0x6A => Ok(OpCode::GateRelease),
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0x70 => Ok(OpCode::Syscall),
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0x80 => Ok(OpCode::FrameSync),
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_ => Err(format!("Invalid OpCode: 0x{:04X}", value)),
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@ -283,10 +318,76 @@ impl OpCode {
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OpCode::PushScope => 3,
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OpCode::PopScope => 3,
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OpCode::Alloc => 10,
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OpCode::LoadRef => 3,
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OpCode::StoreRef => 3,
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OpCode::GateLoad => 3,
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OpCode::GateStore => 3,
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OpCode::GateBeginPeek => 1,
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OpCode::GateEndPeek => 1,
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OpCode::GateBeginBorrow => 1,
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OpCode::GateEndBorrow => 1,
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OpCode::GateBeginMutate => 1,
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OpCode::GateEndMutate => 1,
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OpCode::GateRetain => 1,
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OpCode::GateRelease => 1,
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OpCode::Syscall => 1,
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OpCode::FrameSync => 1,
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}
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}
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}
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#[cfg(test)]
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mod tests {
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use super::*;
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use crate::asm::{assemble, Asm, Operand};
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#[test]
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fn test_opcode_stability() {
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// Normative test: ensures opcode numeric values are frozen.
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assert_eq!(OpCode::Nop as u16, 0x00);
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assert_eq!(OpCode::PushConst as u16, 0x10);
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assert_eq!(OpCode::Alloc as u16, 0x60);
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assert_eq!(OpCode::GateLoad as u16, 0x61);
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assert_eq!(OpCode::GateStore as u16, 0x62);
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assert_eq!(OpCode::GateBeginPeek as u16, 0x63);
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assert_eq!(OpCode::GateEndPeek as u16, 0x64);
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assert_eq!(OpCode::GateBeginBorrow as u16, 0x65);
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assert_eq!(OpCode::GateEndBorrow as u16, 0x66);
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assert_eq!(OpCode::GateBeginMutate as u16, 0x67);
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assert_eq!(OpCode::GateEndMutate as u16, 0x68);
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assert_eq!(OpCode::GateRetain as u16, 0x69);
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assert_eq!(OpCode::GateRelease as u16, 0x6A);
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assert_eq!(OpCode::FrameSync as u16, 0x80);
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}
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#[test]
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fn test_hip_bytecode_golden() {
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// Golden test for HIP opcodes and their encodings.
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// Rule: All multi-byte operands are little-endian.
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let instructions = vec![
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Asm::Op(OpCode::Alloc, vec![Operand::U32(0x11223344), Operand::U32(0x55667788)]),
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Asm::Op(OpCode::GateLoad, vec![Operand::U32(0xAABBCCDD)]),
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Asm::Op(OpCode::GateStore, vec![Operand::U32(0x11223344)]),
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Asm::Op(OpCode::GateBeginPeek, vec![]),
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Asm::Op(OpCode::GateRetain, vec![]),
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Asm::Op(OpCode::GateRelease, vec![]),
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];
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let bytes = assemble(&instructions).unwrap();
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let mut expected = Vec::new();
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// Alloc (0x60, 0x00) + type_id (44 33 22 11) + slots (88 77 66 55)
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expected.extend_from_slice(&[0x60, 0x00, 0x44, 0x33, 0x22, 0x11, 0x88, 0x77, 0x66, 0x55]);
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// GateLoad (0x61, 0x00) + offset (DD CC BB AA)
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expected.extend_from_slice(&[0x61, 0x00, 0xDD, 0xCC, 0xBB, 0xAA]);
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// GateStore (0x62, 0x00) + offset (44 33 22 11)
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expected.extend_from_slice(&[0x62, 0x00, 0x44, 0x33, 0x22, 0x11]);
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// GateBeginPeek (0x63, 0x00)
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expected.extend_from_slice(&[0x63, 0x00]);
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// GateRetain (0x69, 0x00)
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expected.extend_from_slice(&[0x69, 0x00]);
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// GateRelease (0x6A, 0x00)
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expected.extend_from_slice(&[0x6A, 0x00]);
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assert_eq!(bytes, expected);
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}
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}
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@ -161,19 +161,23 @@ impl<'a> BytecodeEmitter<'a> {
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asm_instrs.push(Asm::Op(OpCode::Syscall, vec![Operand::U32(*id)]));
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}
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InstrKind::FrameSync => asm_instrs.push(Asm::Op(OpCode::FrameSync, vec![])),
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InstrKind::Alloc { .. } => asm_instrs.push(Asm::Op(OpCode::Alloc, vec![])),
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InstrKind::Alloc { type_id, slots } => {
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asm_instrs.push(Asm::Op(OpCode::Alloc, vec![Operand::U32(type_id.0), Operand::U32(*slots)]));
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}
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InstrKind::GateLoad { offset } => {
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asm_instrs.push(Asm::Op(OpCode::LoadRef, vec![Operand::U32(*offset)]));
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asm_instrs.push(Asm::Op(OpCode::GateLoad, vec![Operand::U32(*offset)]));
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}
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InstrKind::GateStore { offset } => {
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asm_instrs.push(Asm::Op(OpCode::StoreRef, vec![Operand::U32(*offset)]));
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}
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InstrKind::GateBeginPeek | InstrKind::GateEndPeek |
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InstrKind::GateBeginBorrow | InstrKind::GateEndBorrow |
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InstrKind::GateBeginMutate | InstrKind::GateEndMutate |
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InstrKind::GateRetain | InstrKind::GateRelease => {
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asm_instrs.push(Asm::Op(OpCode::Nop, vec![]));
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asm_instrs.push(Asm::Op(OpCode::GateStore, vec![Operand::U32(*offset)]));
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}
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InstrKind::GateBeginPeek => asm_instrs.push(Asm::Op(OpCode::GateBeginPeek, vec![])),
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InstrKind::GateEndPeek => asm_instrs.push(Asm::Op(OpCode::GateEndPeek, vec![])),
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InstrKind::GateBeginBorrow => asm_instrs.push(Asm::Op(OpCode::GateBeginBorrow, vec![])),
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InstrKind::GateEndBorrow => asm_instrs.push(Asm::Op(OpCode::GateEndBorrow, vec![])),
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InstrKind::GateBeginMutate => asm_instrs.push(Asm::Op(OpCode::GateBeginMutate, vec![])),
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InstrKind::GateEndMutate => asm_instrs.push(Asm::Op(OpCode::GateEndMutate, vec![])),
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InstrKind::GateRetain => asm_instrs.push(Asm::Op(OpCode::GateRetain, vec![])),
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InstrKind::GateRelease => asm_instrs.push(Asm::Op(OpCode::GateRelease, vec![])),
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}
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let end_idx = asm_instrs.len();
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@ -158,10 +158,10 @@ mod tests {
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let opcodes: Vec<_> = instrs.iter().map(|i| i.opcode).collect();
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assert!(opcodes.contains(&OpCode::Alloc));
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assert!(opcodes.contains(&OpCode::LoadRef));
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// After PR-05, BeginMutate/EndMutate map to GateLoad/Nop for now
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// because VM is feature-frozen. StoreRef is removed from lowering.
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assert!(opcodes.contains(&OpCode::Nop));
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assert!(opcodes.contains(&OpCode::GateLoad));
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// After PR-09, BeginMutate/EndMutate map to their respective opcodes
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assert!(opcodes.contains(&OpCode::GateBeginMutate));
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assert!(opcodes.contains(&OpCode::GateEndMutate));
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assert!(opcodes.contains(&OpCode::Add));
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assert!(opcodes.contains(&OpCode::Ret));
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}
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@ -237,25 +237,25 @@ mod tests {
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0052 SetLocal U32(1)
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0058 Jmp U32(100)
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005E Jmp U32(100)
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0064 Alloc
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0066 SetLocal U32(1)
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006C GetLocal U32(1)
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0072 Nop
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0074 SetLocal U32(2)
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007A Nop
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007C GetLocal U32(2)
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0082 LoadRef U32(0)
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0088 SetLocal U32(3)
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008E GetLocal U32(3)
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0094 PushConst U32(5)
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009A Add
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009C SetLocal U32(4)
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00A2 Nop
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00A4 GetLocal U32(1)
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00AA Nop
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00AC GetLocal U32(2)
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00B2 Nop
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00B4 Ret
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0064 Alloc U32(2) U32(1)
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006E SetLocal U32(1)
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0074 GetLocal U32(1)
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007A GateRetain
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007C SetLocal U32(2)
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0082 GateBeginMutate
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0084 GetLocal U32(2)
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008A GateLoad U32(0)
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0090 SetLocal U32(3)
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0096 GetLocal U32(3)
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009C PushConst U32(5)
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00A2 Add
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00A4 SetLocal U32(4)
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00AA GateEndMutate
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00AC GetLocal U32(1)
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00B2 GateRelease
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00B4 GetLocal U32(2)
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00BA GateRelease
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00BC Ret
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"#;
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assert_eq!(disasm_text, expected_disasm);
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@ -544,15 +544,16 @@ impl VirtualMachine {
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self.operand_stack.truncate(frame.scope_stack_base);
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}
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OpCode::Alloc => {
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// Allocates 'size' values on the heap and pushes a reference to the stack
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let size = self.read_u32()? as usize;
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// Allocates 'slots' values on the heap and pushes a reference to the stack
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let _type_id = self.read_u32()?;
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let slots = self.read_u32()? as usize;
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let ref_idx = self.heap.len();
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for _ in 0..size {
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for _ in 0..slots {
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self.heap.push(Value::Null);
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}
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self.push(Value::Ref(ref_idx));
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}
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OpCode::LoadRef => {
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OpCode::GateLoad => {
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// Reads a value from a heap reference at a specific offset
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let offset = self.read_u32()? as usize;
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let ref_val = self.pop()?;
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@ -560,10 +561,10 @@ impl VirtualMachine {
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let val = self.heap.get(base + offset).cloned().ok_or("Invalid heap access")?;
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self.push(val);
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} else {
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return Err("Expected reference for LOAD_REF".into());
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return Err("Expected reference for GATE_LOAD".into());
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}
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}
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OpCode::StoreRef => {
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OpCode::GateStore => {
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// Writes a value to a heap reference at a specific offset
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let offset = self.read_u32()? as usize;
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let val = self.pop()?;
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@ -574,9 +575,18 @@ impl VirtualMachine {
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}
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self.heap[base + offset] = val;
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} else {
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return Err("Expected reference for STORE_REF".into());
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return Err("Expected reference for GATE_STORE".into());
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}
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}
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OpCode::GateBeginPeek | OpCode::GateEndPeek |
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OpCode::GateBeginBorrow | OpCode::GateEndBorrow |
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OpCode::GateBeginMutate | OpCode::GateEndMutate |
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OpCode::GateRetain => {
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// These are no-ops in v0, but they preserve the gate on the stack.
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}
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OpCode::GateRelease => {
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self.pop()?;
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}
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OpCode::Syscall => {
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// Calls a native function implemented by the Firmware/OS.
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// ABI Rule: Arguments are pushed in call order (LIFO).
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@ -1,53 +1,3 @@
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## PR-09 — HIP ISA Freeze v0: Opcode Table + Encoding Contract (Bytecode)
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### Goal
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Freeze the HIP-related opcode set and encoding so bytecode becomes stable.
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### Required Changes
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1. Update `prometeu-bytecode`:
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* Define the canonical HIP opcode subset:
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* `PUSH_CONST`
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* `ALLOC(type_id, slots)`
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* `GATE_BEGIN_PEEK`, `GATE_END_PEEK`
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* `GATE_BEGIN_BORROW`, `GATE_END_BORROW`
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* `GATE_BEGIN_MUTATE`, `GATE_END_MUTATE`
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* `GATE_LOAD(offset)`
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* `GATE_STORE(offset)`
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* `GATE_RETAIN`, `GATE_RELEASE`
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* `FRAME_SYNC` (if included)
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2. Define canonical encodings (normative in comments/doc):
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* `GateId` encoding: `u32` little-endian
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* `TypeId` encoding: `u32` little-endian
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* `ConstId` encoding: `u32` little-endian
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* `slots`: `u32` little-endian
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* `offset`: `u32` little-endian
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3. Update bytecode emitter so it emits these exact opcodes with these exact payloads.
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### Non-goals
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* No runtime execution changes
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### Tests (Mandatory)
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1. **Golden bytecode tests**:
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* Given a minimal VM IR program using each HIP opcode, assert the exact emitted bytes.
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2. **Opcode stability test**:
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* Snapshot test of the opcode enum ordering and numeric values.
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> If opcode numeric values already exist, DO NOT renumber. If new opcodes are added, append them.
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---
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## PR-10 — HIP ABI Freeze v0: Trap Conditions + Debug Surface
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### Goal
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